- 您现在的位置：买卖IC网 > Sheet目录345 > MT48H32M16LFB4-75B IT:C (Micron Technology Inc)IC SDRAM 512MB 54VFBGA
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Truth Tables
Table 19: Truth Table – Current State Bank n, Command to Bank m
Notes 1–6 apply to all parameters and conditions
Current State
CS#
RAS# CAS#
WE# Command/Action
Notes
Any
Idle
Row activating, active, or
H
L
X
L
X
H
X
L
X
H
X
H
X
H
X
H
COMMAND INHIBIT (NOP/continue previous operation)
NO OPERATION (NOP/continue previous operation)
Any command otherwise supported for bank m
ACTIVE (select and activate row)
precharging
Read
(auto precharge disabled)
Write
(auto precharge disabled)
Read
(with auto precharge)
Write
(with auto precharge)
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
READ (select column and start READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start new READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start new READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE
7
7
7, 10
7, 11
9
7, 12
7, 13
9
7, 8, 14
7, 8, 15
9
7, 8, 16
7, 8, 17
9
Notes:
1. This table applies when CKE n-1 was HIGH and CKE n is HIGH (Table 20 (page 37)), and
after t XSR has been met (if the previous state was self refresh).
2. This table describes alternate bank operation, except where noted; for example, the cur-
rent state is for bank n and the commands shown can be issued to bank m , assuming
that bank m is in such a state that the given command is supported. Exceptions are cov-
ered below.
3. Current state definitions:
Idle : The bank has been precharged, and t RP has been met.
Row active : A row in the bank has been activated, and t RCD has been met. No data
bursts/accesses and no register accesses are in progress.
Read : A READ burst has been initiated, with auto precharge disabled, and has not yet
terminated or been terminated.
Write : A WRITE burst has been initiated, with auto precharge disabled, and has not yet
terminated or been terminated.
PDF: 09005aef8459c827
512mb_mobile_sdram_y67m_at.pdf – Rev. B 3/11 EN
35
Micron Technology, Inc. reserves the right to change products or specifications without notice.
? 2011 Micron Technology, Inc. All rights reserved.
发布紧急采购，3分钟左右您将得到回复。
相关PDF资料
MT48H8M16LFB4-75 IT:K TR
IC SDRAM 128MBIT 133MHZ 54VFBGA
MTC100-JA2-P34
CONTACT INSERT PIN
MX841BE
IC CONVERTER WHITE LED 8-SOIC
MXHV9910BTR
IC LED DRIVER HIGH BRIGHT 8-SOIC
MXN12FB12F
MOTOR BRUSHED DC 12V 2922RPM
MXN13FB08B1
MOTOR BRUSHED DC 8V 4714RPM
N01L63W2AB25I
IC SRAM ASYNC 1MBIT ULP 48-BGA
N01L63W3AB25I
IC SRAM 1MBIT 3V LP 48-BGA
相关代理商/技术参数